1. Field of the Invention
The present invention relates to improving receiver resynchronization in half-duplex or polled modem systems and, more particularly, to a procedure for estimating carrier and timing phases of a signal transmitted by a remote modem to allow immediate continuation of data reception.
2. Description of Related Art
High-speed data transmission has become an accepted and expected feature of newer and more complex modems. Generally, transmission occurs as full-duplex (FDX) or half-duplex (HDX). In HDX transmission, information may travel from one end to the other, e.g., from a local modem to a remote, at any given time, thus causing a need to regularly change the direction of transmission. For example, in facsimile transmission, after a "page" is transmitted from one side to the other, the receiving end must indicate whether the page was received without error, or whether a retransmission is needed. This causes an interruption in transmission, and when the next page is to be transmitted, it is important to quickly resume transmission at a high speed. Similarly, FDX transmission generally begins in HDX mode, where training procedures will require a similar "turning around" of the direction of transmission.
Generally, modem transmission begins with a training phase when a receiver configures itself to best receive a modem signal over the channel. This training involves correcting for the level attentuation of the channel (gain control), training up an equalizer which is a filter resembling the inverse of the channel, synchronizing the receiver to the phase and frequency offset of the signal carrier induced by the channel, as well as synchronizing to the symbol timing phase and clock offset between the two modems. Once the receiver has adapted to the remote signal and the channel's effect on it, data transmission can proceed at a high data rate. However, if an interruption occurs, perhaps due to channel "turn-around" mentioned above, this synchronization will be lost. When transmission resumes, it will be necessary to reacquire the symbol timing and carrier phase to continue high-speed reception of data. The equalizer configuration, however, can generally be stored during the interruption, and the carrier frequency offset and symbol timing clock offset generally do not change. Channel attenuation generally does not change either, and can either be stored or re-estimated.
More particularly, during the initial training sequence which is relatively long, when the timing and carrier recovery loops as well as the equalizer are trained up, the frequency offsets of the timing carrier loops are determined via the modem controller. Normally, this is a four-point or sixteen-point uncoded signal constellation, generated from a pseudo-random bit generator. For resynchronization, the timing recovery requires that the "center" of the symbol be determined, while the carrier recovery finds the "reference" phase of the carrier. For example, if the transmitter carrier is cos (.omega.t+a), the receiver demodulates using cos (.mu.t+b). The carrier recovery adapts .mu. toward .omega. and b toward a, such that .mu. and b begin at 0 or some other predetermined value, and are then corrected such that they gradually approach their targets. That is, .mu. approaches .omega., and b approaches a.
In general, the most crucial parameter to reacquire is the timing, or sampling, phase. The timing phase is the symbol reference. The timing recovery is performed by calculating a timing error signal that gives an indication of the error of the symbol phase estimate. For example, its sign may be positive if the timing of the symbol phase is too early and negative if it is too late. The magnitude of the error signal will generally reflect how far off the timing is from the correct symbol phase estimate. This error signal is then passed through a low-pass filter and used to shift the timing phase, either by varying a sampling clock or by controlling an interpolator. Since, by definition, error correction reduces the error, the timing tends to converge toward the optimum phase. At high data rates, for example, where the number of bits per symbol can be as high as 10, the timing phase must be accurately estimated to within 1 to 2%. However, a regular phase-locked loop usually requires a significant amount of time to converge and settle to a good estimate of the symbol phase.
The carrier phase is generally related to the timing phase. If, for example, the transmit clock is running faster than the receiver's clock, the carrier will have a higher frequency in the transmitter relative to the receiver. Further, the channel phase response will change the carrier phase, and may even change the frequency of the carrier (e.g., in Frequency Division Multiplex systems). The carrier recovery corrects for these effects. However, because of the relation to the symbol timing, it must do so either jointly with the symbol timing recovery or after it. A change or correction in symbol timing will produce a change in carrier phase, which may either be corrected via the knowledge of the timing correction, or simply by measuring the carrier phase caused by the timing change and correcting for it.